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Computer architecture: Class 11 Computer Science

Written by Usman Tariq (Computer Science)

The parts of a computer system, the Von Neumann model, the CPU and its registers, buses, the fetch, decode and execute cycle, the memory hierarchy and the factors that affect performance.

Key points

Computer architecture describes how the parts of a computer are arranged and how they work together. Most modern computers follow the Von Neumann model. In this model the program and the data are stored together in the same memory. The central processing unit (CPU) fetches instructions one at a time from the memory and runs them.

The main parts of the CPU:

  • The arithmetic logic unit (ALU) does arithmetic (add, subtract) and logic (AND, OR, NOT, comparison).
  • The control unit (CU) directs the flow of data and signals, and it decodes instructions.
  • Registers are very small, very fast storage places inside the CPU that hold data and addresses that are in use.

Important registers:

  • The program counter (PC) holds the address of the next instruction.
  • The memory address register (MAR) holds the address of the memory location being read or written.
  • The memory data register (MDR) holds the data that was just read from, or is about to be written to, memory.
  • The instruction register (IR) holds the instruction that is being decoded and run.
  • The accumulator holds the result of the ALU's operations.

A bus is a set of wires that carries signals between parts of the computer. The data bus carries data in both directions. The address bus carries the address of a memory location, and it works in one direction from the CPU. The control bus carries control signals such as read, write and clock. The width of the address bus decides how much memory can be addressed: an address bus of n lines can address 2ⁿ locations.

The fetch, decode and execute cycle repeats for every instruction:

  • Fetch: the address in the program counter is copied to the MAR, the instruction is read from memory into the MDR and then the IR, and the program counter is increased by one.
  • Decode: the control unit works out what the instruction means.
  • Execute: the ALU or another part carries out the instruction, and the result is stored.

The memory hierarchy arranges storage by speed and cost. From the fastest and smallest to the slowest and largest, the order is registers, cache memory, main memory (RAM) and secondary storage such as a hard disk or SSD. The faster levels cost more for each byte, so computers have a small amount of them and use cache to keep the most used data close to the CPU.

RAM is volatile memory: it loses its contents when the power is off, and it holds the programs and data in use. ROM is non-volatile and holds fixed instructions such as the start-up program. Cache memory is a small, very fast memory between the CPU and RAM that holds copies of recently used data.

Factors that affect CPU performance:

  • Clock speed, measured in hertz. A 3 GHz processor completes 3 × 10⁹ clock cycles every second.
  • Number of cores. A multi-core CPU can run several instructions at the same time.
  • Size of the cache.
  • Word size and bus width, which decide how much data moves at once.

Instruction sets differ. A CISC (complex instruction set computer) has many instructions, and some do several jobs at once. A RISC (reduced instruction set computer) has fewer, simpler instructions, and each normally runs in one clock cycle. Many mobile devices use RISC processors for their low power use.

Study tip: When you describe the fetch, decode and execute cycle, name the registers in order: PC to MAR, memory to MDR, MDR to IR, then decode and execute.

Definitions and flashcards

Say the meaning first, then open the card to check.

Von Neumann architecture

A design in which instructions and data are stored in the same memory.

ALU

The part of the CPU that carries out arithmetic and logic operations.

Control unit

The part of the CPU that decodes instructions and directs the other parts.

Register

A very small, fast storage place inside the CPU.

Bus

A group of wires that carries data, addresses or control signals.

Cache

A small, very fast memory that holds copies of frequently used data.

Clock speed

The number of clock cycles the CPU completes every second.

Volatile memory

Memory that loses its contents when the power is turned off.

Formula sheet

NameFormulaWhat it means
Addressable locations2ⁿn is the number of address bus lines.
Time for one clock cycleT = 1 / ff is the clock frequency in hertz.
Memory sizelocations × bits in each locationDivide by 8 to get bytes.

Short questions with model answers

These are the kind of questions asked for 2, 3 and 5 marks. Try each one before opening the answer.

What is the Von Neumann architecture? (2 marks)

It is a computer design in which the program instructions and the data are stored in the same memory, and the CPU fetches and runs the instructions one after another.

State the roles of the ALU and the control unit. (3 marks)

The ALU performs arithmetic operations and logic operations. The control unit fetches and decodes instructions and sends signals that direct the other parts of the computer.

Name the three buses and say what each carries. (3 marks)

The data bus carries data between the CPU, memory and devices. The address bus carries the address of the memory location or device. The control bus carries control signals such as read, write and clock.

Describe the fetch, decode and execute cycle. (4 marks)

In the fetch step the address in the program counter is sent to memory and the instruction is brought to the instruction register while the program counter moves to the next address. In the decode step the control unit works out the operation. In the execute step the operation is carried out, usually by the ALU, and the result is stored.

Why does a computer have cache memory? (2 marks)

Main memory is much slower than the CPU. Cache is a small, fast memory that holds recently used data and instructions, so the CPU waits less time for them.

Numericals with worked steps

How many memory locations can be addressed by an address bus with 16 lines?
  1. Number of locations = 2¹⁶.
  2. 2¹⁶ = 65 536.

Answer: 65 536 locations (64 K)

A CPU has a clock speed of 2 GHz. Find the time for one clock cycle.
  1. f = 2 × 10⁹ Hz.
  2. T = 1 / f = 1 / (2 × 10⁹).
  3. T = 0.5 × 10⁻⁹ s = 0.5 ns.

Answer: 0.5 nanoseconds

A memory has 1024 locations and each location stores 8 bits. Find its size in bytes.
  1. Total bits = 1024 × 8 = 8192 bits.
  2. Bytes = 8192 ÷ 8 = 1024 bytes.

Answer: 1024 bytes (1 KB)

How many address lines are needed to address 4096 locations?
  1. 4096 = 2¹².
  2. So 12 address lines are needed.

Answer: 12

Common mistakes

  • Saying that the address bus carries data. It carries only addresses.
  • Confusing RAM (volatile, main memory) with ROM (non-volatile).
  • Believing that a higher clock speed always means a faster computer. Cores, cache and design also matter.
  • Mixing up the memory address register and the memory data register.
  • Writing that the control unit does the calculations. That is the job of the ALU.

Practise this chapter

Practice questions and timed test Printable worksheet

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